Digital signal processors and ADPCM CODEC's are known in the art and innovations in their design and structure have supported great leaps in digitally based communication systems. Digital signal processors (DSPs) typically include a data bus, an instruction bus, a program control unit, data memory, program memory, and an arithmetic unit. The data bus provides a means for transferring data between the data memory, external memory, the arithmetic unit, and the control unit. The instruction bus provides a means for the program control unit to retrieve instructions from the program memory and provides such instructions to the arithmetic unit. Upon receiving an instruction and data, the arithmetic unit performs the indicated operation upon the data, where the operation may be a logical operation, arithmetic function, or combination thereof.
ADPCM CODECs typically comprise the components included in a DSP as well as additional components. The additional components typically include an analog to digital (A) converter and a digital to analog (D/A) converter. The A/D converter typically includes both a sigma-delta modulator and a digital filter. In operation, the sigma-delta modulator receives an analog signal and produces a digital representation thereof. The digital filter filters the digital representation to remove noise introduced in the sampling process. The resulting digital signal is processed by the DSP portion. Concurrently, a digital signal is received and reverse processed by the DSP portion which is subsequently provided to the D/A converter. The D/A converter includes a receive digital filter, a digital modulator, and analog filter to transform the processed digital signal into an analog signal.
As is known, ADPCM CODECs are used in, among other applications, digital cordless telephone systems where ADPCM CODECs reside in both a portable hand-held unit and a base station. Analog data is transmitted to, and received from, the user by an ADPCM CODEC located in the portable unit. The ADPCM CODECs, in conjunction, facilitate communication, in a digital format, between the portable unit and the base unit.
As technology has advanced, the requirement of low power consumption by DSPs and ADPCM CODECs has become prevalent. As those skilled in the art will readily appreciate, power consumption may be reduced in an integrated circuit (IC), such as a DSP or ADPCM CODEC, by lowering the operating voltage. As the operating voltage is reduced, however, the switching period of the components of the DSP increases. To compensate for the increased switching period, the system clock is run at a slower rate, thereby reducing the operating speed of the DSP.
Another power reduction technique is to reduce the capacitance of the buses, or its effects, in the DSP. As is known, capacitance may be reduced by decreasing the length of the bus. While this reduces capacitance, it is not always achievable. Excessive power consumption due to higher capacitance may also be reduced by limiting the use of the bus or by lower the operating rate of the system. Each of these techniques has associated consequences, such as additional die area, lower operating speed, or more complex coding.
Therefore, a need exists for a DSP and/or an ADPCM CODEC that have lower power consumption requirements but without the above mentioned limitations .